2017年６月に発表されたtrident 3、trident 2+の後継と言うよりは。Cavium XPliant等が特徴としているプログラマビリティとテレメトリー機能を特徴としているようです。

従来の流れだと、2017年年末にはこのチップを使用した製品が発表されるでしょう。

 

	trident 2+ BCM56860	trident 3 BCM56870	trident 3 BCM56873
ファブリック容量	1.28Tbps	3.2Tbps	2.0T
SerDes		128x 25G
port構成	40G x 32 10G x 48 X 40G x 6	100Gx32 25G x 48 + 100G x 8	10G x 48 + 100G x 6
host CPU interface		PCIe Gen3 x4	PCIe Gen3 x4
buffer	12MB	32MB	32MB
IPv4 table	64K
IPv6 table	20K

trident 3ファミリーには上記の他にも200Gと小容量の物も用意され、wifiのアクセスポイントなどをターゲットにしているようです。

これからはプログラマブルなシリコンが一般的になるでしょう。

overlay / encap

PPPoE, QUIC,VXLAN-GPE,Geneve, ILA

VXLAN GPE(Generic Protocol Extension)

eternet以外をカプセル化するフォーマット。ダイレクトにIPv4,IPv6とか

NSH(Network Service Header)

programmable pipeline

five stage、ファブリックの前に三段、後に二段。

telemetry

https://youtu.be/Wp9wtS-e1QU

Tomahawk® 3

	Tomahawk®	Tomahawk® 2	Tomahawk® 3
	BCM56960	BCM56970	BCM56980 BCM56982
capacity	3.2T	6.4T	12.8T
typical config	100G x 32	100G x 64	400G x 32
host CPU interface	Gen2 x4		PCIe Gen3 x4
packet buffer	85 MB
SERDES	128 x 25Gbps	256 x 25Gbps	256 x 56G-PAM4
process	28nm	16nm	16nm	7nm
annaunce	2014/09/24	2016/10/11	2017/12/19	2019?

https://jp.broadcom.com/company/news/product-releases/2323373

http://blog.ipspace.net/2015/12/broadcom-tomahawk-101.html

• Similar to Trident-2, Tomahawk becomes line-rate (3.2 Tbps) at packet sizes above 250 bytes;
• Presentation claims overlay routing (VXLAN-to-VXLAN or VXLAN-to-VLAN) is not supported, which is a bit surprising as the forwarding pipeline includes tunnel termination before L2 and L3 lookup, which should be good enough;
• The switching silicon has 10 queues per port (nice!);
• Switching latency is approximately 500 ns and can be reduced to 300 ns if the chipset is reconfigured into doing only simple L2 switching;
• Unified forwarding table (UFT; 128K entries) is split in memory banks that can be allocated to L2 entries, ARP entries and L3 LPM entries;
• One of the printouts in the presentation hinted at 1K LPM IPv6 prefixes longer than /64;
• Tomahawk support exact matching of ACL entries in UFT (not TCAM). UFT split with filter-mode profile can have 64K ACL entries, 16K IP LPM entries and 8K ARP/MAC entries;
• There are 43 queues between the switching silicon and CPU, and you can configure control-plane policing parameters on each queue;
• The hardware supports 16K MPLS labels (must be a separate MPLS lookup table, not TCAM tricks);
• TCAM slicing is too tricky for me to understand, but it seems you’ll get between 512 and 6K TCAM entries based on the complexity of the matching conditions. Based on the matching length used by Junos you get up to 512 port- or VLAN ACL entries or up to 1024 IP ACL entries;
• TCAM is not wide enough for all possible IPv6 matching conditions, so the hardware uses address compression. It seems you can have at most 128 source and destination IPv6 addresses in all filters deployed on the box;

Mellanox Spectrum-2

2017/07/07アナウンス

400G x 16 port

http://ir.mellanox.com/releasedetail.cfm?ReleaseID=1032283

CAVIUM XPliant

		capacity	SERDES		release
XP80	CNX880XX	3.2Tbps	25G x n	28nm	2014/09
XP60	CNX680XX	720Gbps	10G x n	28nm	2017/07
XP70	CNX700XX	1.4Tbps	25G x n	28nm	2017/07

XP70はDELL SonicWALLに使われている？

XP80(CNX88091)はEdgeCore AS7512に搭載されている

XP80(CNX88091)はWedge 100Cに搭載されている

XP80はArista 7160に搭載されている